My original FPGA-64 project didn't go unnoticed. The story started when
Jens asked me if I would like to port my FPGA64 project to the C-One board.
Initially I wasn't really motivated as it worked correctly on a
Xilinx Spartan-3 kit and I didn't have any C-One board myself.
We discussed the options and Jens offered to send me a C-One board so
I could do the port myself. The original plan was to focus on
using the 65816 as it is shipped with all the boards.
Things always run differently as expected...
Currently I'm the owner of the 'cone_cores' yahoo mailing list at
You are welcome there to get help with developing own cores for the C-One. Report bugs discovered in the available cores. Or discuss technical details about emulating old computers in FPGAs.
To see a complete overview of available cores visit the official download site at: http://c64upgra.de/c-one
Manuals and documents
Last update 20100713. C-One core writer manual. Contains technical documentation about the C-One and some vhdl code examples.
My latest cores
Preview of the Chameleon core for C-One. Demos SID emulation in FPGA (SID sockets on C-One are disabled). A 1351 mouse emulation is provided when using a ps/2 mouse. The numeric keypad on the keyboard functions as joystick (2,4,6 and 8 for direction, 0 is fire). Use Num-Lock key to switch between emulation of Joystick 1 and 2. Ofcourse the two joystick ports can also be used to connect joysticks as usual. As the SID is completely emulated, paddles and real 1351 mice won't work with this core!
/zips/20090602_chameleon.zip ; /zips/20090602_chameleon_negvsync.zip (20090602)
Preview of the Chameleon core for C-One. Early version no cartridge, no VGA registers, no Turbo and only 8M of memory (REU size limited at 2M). A 1351 mouse emulation is provided using a ps/2 mouse.
FPGA-64: Cycle-Exact Commodore64 PAL/NTSC core exclusive for C-One. Binary only release, no vhdl!
Core for the C-One + Extender board. Tests a 800x600 resolution with pseudo 24 bit colors screen.
Core for the C-One + Extender board. Tests a 800x600 resolution with pseudo 24 bit colors screen. With sync polarity H=pos/V=pos setting, project files and vhdl source-code released under lgpl.
Example vhdl code and project file for showing how to reconfigure the 1k30 fpga from the 1k100. This allows dual or tripple FPGA designs to be developed for the C-One. All the details are explained in the cone_core_development manual. You need to copy one file from the chameleon core, so download this too if you haven't done so already.
Example core to show how to use a PS/2 mouse on the C-One. Includes vhdl code, project file and pre-compiled images.